Using Verilog VPI for Mixed Level Serial Fault Simulation in a Test Generation Environment - researchr publication

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Pedram A. Riahi, Zainalabedin Navabi, Fabrizio Lombardi. Using Verilog VPI for Mixed Level Serial Fault Simulation in a Test Generation Environment. In Hamid R. Arabnia, Laurence Tianruo Yang, editors, Proceedings of the International Conference on Embedded Systems and Applications, ESA 03, June 23 - 26, 2003, Las Vegas, Nevada, USA. pages 139-143, CSREA Press, 2003.

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