DEEP: an iterative fpga-based many-core emulation system for chip verification and architecture research - researchr publication authors

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Juergen Ributzka, Yuhei Hayashi, Fei Chen, Guang R. Gao. DEEP: an iterative fpga-based many-core emulation system for chip verification and architecture research. In John Wawrzynek, Katherine Compton, editors, Proceedings of the ACM/SIGDA 19th International Symposium on Field Programmable Gate Arrays, FPGA 2011, Monterey, California, USA, February 27, March 1, 2011. pages 115-118, ACM, 2011. [doi]

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