A Resource-Saving Energy-Efficient Reconfigurable Hardware Accelerator for BERT-based Deep Neural Network Language Models using FFT Multiplication - researchr publication authors

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Rodrigue Rizk, Dominick Rizk, Frederic Rizk, Ashok Kumar 0001, Magdy A. Bayoumi. A Resource-Saving Energy-Efficient Reconfigurable Hardware Accelerator for BERT-based Deep Neural Network Language Models using FFT Multiplication. In IEEE International Symposium on Circuits and Systems, ISCAS 2022, Austin, TX, USA, May 27 - June 1, 2022. pages 1675-1679, IEEE, 2022. [doi]

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