The following publications are possibly variants of this publication:
- A 0.8-/spl mu/m CMOS two-dimensional programmable mixed-signal focal-plane array processor with on-chip binary imaging and instructions storageRafael Domínguez-Castro, Servando Espejo, Ángel Rodríguez-Vázquez, Ricardo Carmona, Péter Földesy, Ákos Zarándy, Péter Szolgay, Tamás Szirányi, Tamás Roska. jssc, 32(7):1013-1026, 1997. [doi]
- A processing element architecture for high-density focal plane analog programmable array processorsGustavo Liñan Cembrano, Servando Espejo-Meana, Rafael Domínguez-Castro, Ángel Rodríguez-Vázquez. iscas 2002: 341-344 [doi]