Efficient Partial Sum Architecture and Memory Reduction Method for SC-Flip Polar Decoder - researchr publication authors

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Jae Hong Roh, Useok Lee, Yongje Lee, Myung Hoon Sunwoo. Efficient Partial Sum Architecture and Memory Reduction Method for SC-Flip Polar Decoder. In 18th International SoC Design Conference, ISOCC 2021, Jeju Island, South Korea, Republic of, October 6-9, 2021. pages 19-20, IEEE, 2021. [doi]

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