Hierarchical gate-level verification of speed-independent circuits

Oriol Roig, Jordi Cortadella, Enric Pastor. Hierarchical gate-level verification of speed-independent circuits. In Second Working Conference on Asynchronous Design Methodologies, May 30-31, 1995, London, England, UK. pages 128-137, IEEE Computer Society, 1995. [doi]

@inproceedings{RoigCP95,
  title = {Hierarchical gate-level verification of speed-independent circuits},
  author = {Oriol Roig and Jordi Cortadella and Enric Pastor},
  year = {1995},
  url = {http://csdl.computer.org/comp/proceedings/async/1995/7098/00/70980128abs.htm},
  researchr = {https://researchr.org/publication/RoigCP95},
  cites = {0},
  citedby = {0},
  pages = {128-137},
  booktitle = { Second Working Conference on Asynchronous Design Methodologies, May 30-31, 1995, London, England, UK},
  publisher = {IEEE Computer Society},
}