Switch level optimization of digital CMOS gate networks

Leomar S. da Rosa Jr., Felipe Ribeiro Schneider, Renato P. Ribas, AndrĂ© InĂ¡cio Reis. Switch level optimization of digital CMOS gate networks. In 10th International Symposium on Quality of Electronic Design (ISQED 2009), 16-18 March 2009, San Jose, CA, USA. pages 324-329, IEEE, 2009. [doi]

Abstract

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