Automated synthesis and verification of embedded systems: wishful thinking or reality?

Wolfgang Rosenstiel. Automated synthesis and verification of embedded systems: wishful thinking or reality?. In Proceedings of the 14th Asia South Pacific Design Automation Conference, ASP-DAC 2009, Yokohama, Japan, January 19-22, 2009. IEEE, 2009. [doi]

Authors

Wolfgang Rosenstiel

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