A Fast Concurrent Power-Thermal Model for Sub-100nm Digital ICs

José Luis Rosselló, Vicens Canals, Sebastià A. Bota, Ali Keshavarzi, Jaume Segura. A Fast Concurrent Power-Thermal Model for Sub-100nm Digital ICs. In 2005 Design, Automation and Test in Europe Conference and Exposition (DATE 2005), 7-11 March 2005, Munich, Germany. pages 206-211, IEEE Computer Society, 2005. [doi]

Abstract

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