Low Cost Concurrent Error Detection Strategy for the Control Logic of High Performance Microprocessors and Its Application to the Instruction Decoder

Daniele Rossi, Martin OmaƱa, G. Garrammone, Cecilia Metra, Abhijit Jas, Rajesh Galivanche. Low Cost Concurrent Error Detection Strategy for the Control Logic of High Performance Microprocessors and Its Application to the Instruction Decoder. J. Electronic Testing, 29(3):401-413, 2013. [doi]

Abstract

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