Sounak Roy, Swapna Banerjee. A 9 bit 400 MHz CMOS Double-Sampled Sample-and-Hold Amplifier. In 21st International Conference on VLSI Design (VLSI Design 2008), 4-8 January 2008, Hyderabad, India. pages 323-329, IEEE Computer Society, 2008. [doi]
@inproceedings{RoyB08:4,
title = {A 9 bit 400 MHz CMOS Double-Sampled Sample-and-Hold Amplifier},
author = {Sounak Roy and Swapna Banerjee},
year = {2008},
doi = {10.1109/VLSI.2008.78},
url = {http://doi.ieeecomputersociety.org/10.1109/VLSI.2008.78},
researchr = {https://researchr.org/publication/RoyB08%3A4},
cites = {0},
citedby = {0},
pages = {323-329},
booktitle = {21st International Conference on VLSI Design (VLSI Design 2008), 4-8 January 2008, Hyderabad, India},
publisher = {IEEE Computer Society},
}