A 9 bit 400 MHz CMOS Double-Sampled Sample-and-Hold Amplifier - researchr publication

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Sounak Roy, Swapna Banerjee. A 9 bit 400 MHz CMOS Double-Sampled Sample-and-Hold Amplifier. In 21st International Conference on VLSI Design (VLSI Design 2008), 4-8 January 2008, Hyderabad, India. pages 323-329, IEEE Computer Society, 2008. [doi]

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