Surajit Kumar Roy, Chandan Giri, Sourav Ghosh, Hafizur Rahaman. Optimizing Test Wrapper for Embedded Cores Using TSV Based 3D SOCs. In IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2011, 4-6 July 2011, Chennai, India. pages 31-36, IEEE Computer Society, 2011. [doi]
@inproceedings{RoyGGR11,
title = {Optimizing Test Wrapper for Embedded Cores Using TSV Based 3D SOCs},
author = {Surajit Kumar Roy and Chandan Giri and Sourav Ghosh and Hafizur Rahaman},
year = {2011},
doi = {10.1109/ISVLSI.2011.33},
url = {http://dx.doi.org/10.1109/ISVLSI.2011.33},
tags = {optimization, rule-based, testing},
researchr = {https://researchr.org/publication/RoyGGR11},
cites = {0},
citedby = {0},
pages = {31-36},
booktitle = {IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2011, 4-6 July 2011, Chennai, India},
publisher = {IEEE Computer Society},
}