Optimizing Test Wrapper for Embedded Cores Using TSV Based 3D SOCs

Surajit Kumar Roy, Chandan Giri, Sourav Ghosh, Hafizur Rahaman. Optimizing Test Wrapper for Embedded Cores Using TSV Based 3D SOCs. In IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2011, 4-6 July 2011, Chennai, India. pages 31-36, IEEE Computer Society, 2011. [doi]

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