Accelerating Itoh-Tsujii multiplicative inversion algorithm for FPGAs

Sujoy Sinha Roy, Chester Rebeiro, Debdeep Mukhopadhyay. Accelerating Itoh-Tsujii multiplicative inversion algorithm for FPGAs. In David Atienza, Yuan Xie, José L. Ayala, Ken S. Stevens, editors, Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, Lausanne, Switzerland, May 2-6, 2011. pages 67-72, ACM, 2011. [doi]

@inproceedings{RoyRM11,
  title = {Accelerating Itoh-Tsujii multiplicative inversion algorithm for FPGAs},
  author = {Sujoy Sinha Roy and Chester Rebeiro and Debdeep Mukhopadhyay},
  year = {2011},
  doi = {10.1145/1973009.1973024},
  url = {http://doi.acm.org/10.1145/1973009.1973024},
  researchr = {https://researchr.org/publication/RoyRM11},
  cites = {0},
  citedby = {0},
  pages = {67-72},
  booktitle = {Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, Lausanne, Switzerland, May 2-6, 2011},
  editor = {David Atienza and Yuan Xie and José L. Ayala and Ken S. Stevens},
  publisher = {ACM},
  isbn = {978-1-4503-0667-6},
}