Layout-level design for testability rules for a CMOS cell library

M. Rullán, F. C. Blom, J. Oliver, C. Ferrer. Layout-level design for testability rules for a CMOS cell library. In Proceedings of the European Design Automation Conference 1993, EURO-DAC '93 with EURO-VHDL'93, Hamburg, Germany, September 20-24, 1993. pages 214-218, IEEE Computer Society, 1993. [doi]

Authors

M. Rullán

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F. C. Blom

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J. Oliver

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C. Ferrer

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