Ka-Band Stacked Power Amplifier on 22 nm CMOS FDSOI Technology Utilizing Back-Gate Bias for Linearity Improvement

Jere Rusanen, Mikko Hietanen, Alok Sethi, Timo Rahkonen, Aarno Pärssinen, Janne P. Aikio. Ka-Band Stacked Power Amplifier on 22 nm CMOS FDSOI Technology Utilizing Back-Gate Bias for Linearity Improvement. In Jari Nurmi, Peeter Ellervee, Kari Halonen, Juha Röning, editors, 2019 IEEE Nordic Circuits and Systems Conference, NORCAS 2019: NORCHIP and International Symposium of System-on-Chip (SoC), Helsinki, Finland, October 29-30, 2019. pages 1-4, IEEE, 2019. [doi]

@inproceedings{RusanenHSRPA19,
  title = {Ka-Band Stacked Power Amplifier on 22 nm CMOS FDSOI Technology Utilizing Back-Gate Bias for Linearity Improvement},
  author = {Jere Rusanen and Mikko Hietanen and Alok Sethi and Timo Rahkonen and Aarno Pärssinen and Janne P. Aikio},
  year = {2019},
  doi = {10.1109/NORCHIP.2019.8906915},
  url = {https://doi.org/10.1109/NORCHIP.2019.8906915},
  researchr = {https://researchr.org/publication/RusanenHSRPA19},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {2019 IEEE Nordic Circuits and Systems Conference, NORCAS 2019: NORCHIP and International Symposium of System-on-Chip (SoC), Helsinki, Finland, October 29-30, 2019},
  editor = {Jari Nurmi and Peeter Ellervee and Kari Halonen and Juha Röning},
  publisher = {IEEE},
  isbn = {978-1-7281-2769-9},
}