Yesin Ryu, Young-Cheon Kwon, Jae-Hoon Lee, Sung-Gi Ahn, Jaewon Park, Kijun Lee, Yu Ho Choi, Han-Won Cho, Jae-San Kim, Jungyu Lee 0002, Haesuk Lee, Seung-Ho Song, Je-Min Ryu, Yeong Ho Yun, Useung Shin, Dajung Cho, Jeong Hoan Park, Jae-Seung Jeong, Suk-Han Lee, Kyounghwan Lim, Tae Sung Kim, Kyungmin Kim, Yu Jin Cha, Ik Joo Lee, Tae Kyu Byun, Han Sik Yoo, Yeong Geol Song, Myung-Kyu Lee, Sunghye Cho, Sung-Rae Kim, Ji-Min Choi, HyoungMin Kim, Soo Young Kim, Jaeyoun Youn, Myeong-O. Kim, Kyomin Sohn, Sangjoon Hwang, Jooyoung Lee. A 16 GB 1024 GB/s HBM3 DRAM with On-Die Error Control Scheme for Enhanced RAS Features. In IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022. pages 130-131, IEEE, 2022. [doi]
@inproceedings{RyuKLAPLCCK0LSR22,
title = {A 16 GB 1024 GB/s HBM3 DRAM with On-Die Error Control Scheme for Enhanced RAS Features},
author = {Yesin Ryu and Young-Cheon Kwon and Jae-Hoon Lee and Sung-Gi Ahn and Jaewon Park and Kijun Lee and Yu Ho Choi and Han-Won Cho and Jae-San Kim and Jungyu Lee 0002 and Haesuk Lee and Seung-Ho Song and Je-Min Ryu and Yeong Ho Yun and Useung Shin and Dajung Cho and Jeong Hoan Park and Jae-Seung Jeong and Suk-Han Lee and Kyounghwan Lim and Tae Sung Kim and Kyungmin Kim and Yu Jin Cha and Ik Joo Lee and Tae Kyu Byun and Han Sik Yoo and Yeong Geol Song and Myung-Kyu Lee and Sunghye Cho and Sung-Rae Kim and Ji-Min Choi and HyoungMin Kim and Soo Young Kim and Jaeyoun Youn and Myeong-O. Kim and Kyomin Sohn and Sangjoon Hwang and Jooyoung Lee},
year = {2022},
doi = {10.1109/VLSITechnologyandCir46769.2022.9830391},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830391},
researchr = {https://researchr.org/publication/RyuKLAPLCCK0LSR22},
cites = {0},
citedby = {0},
pages = {130-131},
booktitle = {IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
publisher = {IEEE},
isbn = {978-1-6654-9772-5},
}