Hardware Efficient Multiplier Design Using an Optimal Mix of Approximate Booth Encodings

Chandan Kumar N. S, Bhavana S, Ajitesh Kumar Singh, Madhav Rao. Hardware Efficient Multiplier Design Using an Optimal Mix of Approximate Booth Encodings. In 43rd IEEE International Conference on Computer Design, ICCD 2025, Richardson, TX, USA, November 10-12, 2025. pages 41-48, IEEE, 2025. [doi]

Authors

Chandan Kumar N. S

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Bhavana S

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Ajitesh Kumar Singh

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Madhav Rao

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