High-Speed Reduced Stack Dual Lock Circuits

Nisrine Saadallah, Xiaohua Kong, Radu Negulescu. High-Speed Reduced Stack Dual Lock Circuits. In 10th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2004), 19-23 April 2004, Crete, Greece. pages 219-228, IEEE Computer Society, 2004. [doi]

@inproceedings{SaadallahKN04,
  title = {High-Speed Reduced Stack Dual Lock Circuits},
  author = {Nisrine Saadallah and Xiaohua Kong and Radu Negulescu},
  year = {2004},
  url = {http://csdl.computer.org/comp/proceedings/async/2004/2133/00/21330219abs.htm},
  researchr = {https://researchr.org/publication/SaadallahKN04},
  cites = {0},
  citedby = {0},
  pages = {219-228},
  booktitle = {10th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2004), 19-23 April 2004, Crete, Greece},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-2133-9},
}