Design of Reliable SoCs With BIST Hardware and Machine Learning

Mehdi Sadi, Gustavo K. Contreras, Jifeng Chen, LeRoy Winemberg, Mark Tehranipoor. Design of Reliable SoCs With BIST Hardware and Machine Learning. IEEE Trans. VLSI Syst., 25(11):3237-3250, 2017. [doi]

Abstract

Abstract is missing.