An FPGA-Based Performance Analysis of the Unrolling, Tiling, and Pipelining of the AES Algorithm

Giacinto Paolo Saggese, Antonino Mazzeo, Nicola Mazzocca, Antonio G. M. Strollo. An FPGA-Based Performance Analysis of the Unrolling, Tiling, and Pipelining of the AES Algorithm. In Peter Y. K. Cheung, George A. Constantinides, José T. de Sousa, editors, Field Programmable Logic and Application, 13th International Conference, FPL 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings. Volume 2778 of Lecture Notes in Computer Science, pages 292-302, Springer, 2003. [doi]