CL(R)Early: An Early-stage DSE Methodology for Cross-Layer Reliability-aware Heterogeneous Embedded Systems

Siva Satyendra Sahoo, Bharadwaj Veeravalli, Akash Kumar 0001. CL(R)Early: An Early-stage DSE Methodology for Cross-Layer Reliability-aware Heterogeneous Embedded Systems. In 57th ACM/IEEE Design Automation Conference, DAC 2020, San Francisco, CA, USA, July 20-24, 2020. pages 1-6, IEEE, 2020. [doi]

@inproceedings{SahooV020,
  title = {CL(R)Early: An Early-stage DSE Methodology for Cross-Layer Reliability-aware Heterogeneous Embedded Systems},
  author = {Siva Satyendra Sahoo and Bharadwaj Veeravalli and Akash Kumar 0001},
  year = {2020},
  doi = {10.1109/DAC18072.2020.9218747},
  url = {https://doi.org/10.1109/DAC18072.2020.9218747},
  researchr = {https://researchr.org/publication/SahooV020},
  cites = {0},
  citedby = {0},
  pages = {1-6},
  booktitle = {57th ACM/IEEE Design Automation Conference, DAC 2020, San Francisco, CA, USA, July 20-24, 2020},
  publisher = {IEEE},
  isbn = {978-1-7281-1085-1},
}