CL(R)Early: An Early-stage DSE Methodology for Cross-Layer Reliability-aware Heterogeneous Embedded Systems

Siva Satyendra Sahoo, Bharadwaj Veeravalli, Akash Kumar 0001. CL(R)Early: An Early-stage DSE Methodology for Cross-Layer Reliability-aware Heterogeneous Embedded Systems. In 57th ACM/IEEE Design Automation Conference, DAC 2020, San Francisco, CA, USA, July 20-24, 2020. pages 1-6, IEEE, 2020. [doi]

Abstract

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