K. S. Sainarayanan, Chittarsu Raghunandan, M. B. Srinivas. Bus encoding schemes for minimizing delay in VLSI interconnects. In Antonio Petraglia, Volnei A. Pedroni, Gert Cauwenberghs, editors, Proceedings of the 20th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2007, Copacabana, Rio de Janeiro, Brazil, September 3-6, 2007. pages 184-189, ACM, 2007. [doi]
Abstract is missing.