Abstract is missing.
- Highly sensitive, low-cost integrated biosensorsM. Jamal Deen. 1 [doi]
- Meeting with the forthcoming IC designTakayasu Sakurai. 2 [doi]
- WiMAX: a competing or complementary technology to 3G?Mohammed Ismail. 3 [doi]
- Nanotechnology and emerging memoriesBetty Prince. 4 [doi]
- Low power design techniques for nanometer design processes: 65 nm and smallerSubhomoy Chattopadhyay. 5 [doi]
- RF architectures in CMOS for the emerging wireless technologies: challenges and opportunitiesAhmed A. Youssef. 6 [doi]
- First-pass-silicon radio IPs for B3G wireless networksMohammed Ismail. 7 [doi]
- Focal plane processors & pixel level processing: mimicking natural vision systems to solve image processing problemsGustavo Liñan Cembrano. 8 [doi]
- Embedded non-volatile memoriesBetty Prince. 9 [doi]
- A small area 8bits 50MHz CMOS DAC for bluetooth transmitterHugo Daniel Hernández, Wilhelmus A. M. Van Noije, Elkim Roa, João Navarro Jr.. 10-15 [doi]
- Suppression of delta-sigma DAC quantisation noise by bandwidth adaptationJørgen Andreas Michaelsen, Dag T. Wisland. 16-20 [doi]
- Novel swapping technique for background calibration of capacitor mismatching in pipeline ADCSAntonio J. Ginés, Eduardo J. Peralías, Adoración Rueda. 21-26 [doi]
- High-speed CMOS analog-to-digital converter for front-end receiver applicationsA. A. Mariano, B. Boumballa, Dominique Dallet, Yann Deval, Jean-Baptiste Begueret. 27-30 [doi]
- A ultra low power CMOS pA/V transconductor and its application to wavelet filtersPeterson R. Agostinho, Sandro A. P. Haddad, Jader A. De Lima, Wouter A. Serdijn, Osamu Saotome. 31-35 [doi]
- A programmable voltage reference optimized for power management applicationsFilipe G. Ramos, Laercio Caldeira, Tales Cleber Pimenta. 36-41 [doi]
- Trim range limited by noise in bandgap voltage referencesDalton M. Colombo, Gilson I. Wirth, Sergio Bampi. 42-47 [doi]
- Current mode instrumentation amplifier with rail-to-rail input and outputFilipe Costa Beber Vieira, César Augusto Prior, Cesar Ramos Rodrigues, Leonardo Perin, João Baptista dos Santos Martins. 48-52 [doi]
- A multisampling time-domain CMOS imager with synchronous readout circuitFernando de Souza Campos, Ognian Marinov, Naser Faramarzpour, Fayçal Saffih, M. Jamal Deen, Jacobus W. Swart. 53-58 [doi]
- A systematic method to approximate capacitance ratios to improve capacitance matching in SC filtersCarlos Fernando Teodósio Soares, Antonio Petraglia. 59-64 [doi]
- On the design of ultra low noise amplifiers for ENG recordingAlfredo Arnaud, Martin Bremermann, Joel Gak, Matias Miguez. 65-70 [doi]
- Design of an integrated low power high CMRR instrumentation amplifier for biomedical applicationsCésar Augusto Prior, Cesar Ramos Rodrigues, João Baptista dos Santos Martins, André Luiz Aita, Filipe Costa Beber Vieira. 71-75 [doi]
- Design of a class D amplifier for hearing aid devicesDaniel N. Ruiz, Robson L. Moreno, Tales Cleber Pimenta. 76-80 [doi]
- Model driven engineering for MPSOC design space explorationMarcio F. da S. Oliveira, Eduardo Wenzel Brião, Francisco Assis M. do Nascimento, Flávio Rech Wagner. 81-86 [doi]
- Cell placement on graphics processing unitsGuilherme Flach, Marcelo de Oliveira Johann, Renato Fernandes Hentschke, Ricardo Reis. 87-92 [doi]
- A comparative study of CMOS gates with minimum transistor stacksLeomar S. da Rosa Jr., André Inácio Reis, Renato P. Ribas, Felipe de Souza Marques, Felipe Ribeiro Schneider. 93-98 [doi]
- Buffer sizing for QoS flows in wormhole packet switching NoCsLeonel Tedesco, Fernando Moraes, Ney Calazans. 99-104 [doi]
- Fitting the router characteristics in NoCs to meet QoS requirementsEdgard de Faria Corrêa, Leonardo Alves de Paula e Silva, Flávio Rech Wagner, Luigi Carro. 105-110 [doi]
- Router architecture for high-performance NoCsEverton Carara, Fernando Moraes, Ney Calazans. 111-116 [doi]
- A 9.6 kb/s CMOS FSK modem for data transmission through power linesWalter J. Lancioni, Pablo A. Petrashin, Luis E. Toledo, Carlos Dualibe. 117-122 [doi]
- A 4.1 GHz prescaler using double data throughput E-TSPC structuresFernando P. H. de Miranda, João Navarro Jr., Wilhelmus A. M. Van Noije. 123-127 [doi]
- TrACS: transceiver architecture and wireless channel simulatorChithrupa Ramesh, Ana Rusu, Mohammed Ismail, Mikael Skoglund. 128-132 [doi]
- A CMOS AM demodulator for instrumentation applicationsPietro Maris Ferreira, Antonio Petraglia, Fernando Antonio Pinto Baruqui. 133-136 [doi]
- Design of a digital FM demodulator based on a 2nddegree order all-digital phase-locked loopJuan Pablo Martinez Brito, Sergio Bampi. 137-141 [doi]
- Digital PM demodulator for brazilian data collecting systemJose Marcelo Lima Duarte, Francisco das Chagas Mota, Manoel J. M. Carvalho. 142-146 [doi]
- A unified and reconfigurable Montgomery Multiplier architecture without four-to-two CSASudhakar Maddi, M. B. Srinivas. 147-152 [doi]
- Optimization techniques for a reconfigurable, self-timed, and bit-serial architectureFlorian Dittmann, Achim Rettberg, Raphael Weber. 153-158 [doi]
- RoSA: a reconfigurable stream-based architectureMonica Magalhães Pereira, Bruno Cruz de Oliveira, Ivan Saraiva Silva. 159-164 [doi]
- A reconfigurable platform for multi-service edge routersChristoforos Kachris, Stamatis Vassiliadis. 165-170 [doi]
- Aquarius: a dynamically reconfigurable computing platformJordana L. Seixas, Edson Barbosa, Stelita M. da Silva, Paulo Sérgio B. do Nascimento, Vinícius Kursancew, Remy Eskinazi Sant Anna, Edna Barros, Manoel Eusebio de Lima. 171-176 [doi]
- Design of adaptive multiprocessor on chip systemsChristophe Bobda, Thomas Haller, Felix Mühlbauer, Dennis Rech, Simon Jung. 177-183 [doi]
- Bus encoding schemes for minimizing delay in VLSI interconnectsK. S. Sainarayanan, Chittarsu Raghunandan, M. B. Srinivas. 184-189 [doi]
- A built-in current sensor for high speed soft errors detection robust to process and temperature variationsEgas Henes Neto, Fernanda Lima Kastensmidt, Gilson I. Wirth. 190-195 [doi]
- Soft-well digital circuit designJens Petter Abrahamsen, Tor Sverre Lande. 196-201 [doi]
- Transfer characteristics and high frequency modeling of logic gates using carbon nanotube field effect transistors (CNT-FETs)Jose M. Marulanda, Ashok Srivastava, Ashwani K. Sharma. 202-206 [doi]
- Modeling and analysis of crosstalk for distributed RLC interconnects using difference model approachRavindra V. R. Jayanthi, Srinivas Bala Mandalika. 207-211 [doi]
- Instantaneous de-embedding of the on-wafer equivalent-circuit parameters of acoustic resonator (FBAR) for integrated circuit applicationsHumberto Campanella, Arantxa Uranga, Pascal Nouet, Pedro De Paco, Nuria Barniol, Jaume Esteve. 212-217 [doi]
- Three-dimensional on-chip inductance and resistance extractionAlexandre Nentchev, Siegfried Selberherr. 218-223 [doi]
- High-speed, model-free adaptive control using parallel synchronous detectionDimitrios N. Loizos, Paul-Peter Sotiriadis, Gert Cauwenberghs. 224-229 [doi]
- Radial basis function network applied to the linearization of a voltage controlled oscillatorMarcio Barbosa Lucks, Nobuo Oki. 230-235 [doi]
- Viability of analog inner product operations in CMOS imagersHugo L. Haas, José Gabriel Rodríguez Carneiro Gomes, Antonio Petraglia. 236-240 [doi]
- CMOS encoder for scale-independent pattern recognitionJulio Saldaña Pumarica, Emílio Del Moral Hernandez, Carlos Silva Cárdenas. 241-244 [doi]
- Contributions to improve design accuracy of bipolar ics via physical effectsAgnes Nagy, Alicia Polanco, Manuel Alvarez. 245-250 [doi]
- A quasi-differential quantizer based on SMOBILEJuan Núñez, José M. Quintana, Maria J. Avedillo. 251-256 [doi]
- Layout techniques for radiation hardening of standard CMOS active pixel sensorsLeo Huf Campos Braga, Suzana Domingues, Milton F. Rocha, Leonardo Bruno de Sá, Fernando de Souza Campos, Filipe V. Santos, Antonio Carneiro Mesquita, Mário Vaz Silva, Jacobus W. Swart. 257-262 [doi]
- Total ionizing dose effects in switched-capacitor filters using oscillation-based testJohn M. Espinosa-Duran, Jaime Velasco-Medina, Gloria Huertas, José Luis Huertas. 263-266 [doi]
- Minimizing the mismatch errors at the VCO and cascode buffer connections in front end of BiCMOS RFICs operating on S bandC. N. M. Marins, L. C. Kretly. 267-270 [doi]
- A fully integrated CMOS RF front-end for a multi-band analog mixed-signal interfaceFernando da Rocha Paixão Cortes, Sergio Bampi. 271-275 [doi]
- A 915 MHz UHF low power RFID tagCésar A. M. Marcon, José Carlos S. Palma, Fabiano Hessel, Eduardo Bezerra, Guilherme Rohde, Carlos Eduardo Reif, Luciano Azevedo, Carolina Metzler. 276-281 [doi]
- A hybrid memory organization to enhance task migration and dynamic task allocation in NoC-based MPSoCsDaniel Barcelos, Eduardo Wenzel Brião, Flávio Rech Wagner. 282-287 [doi]
- Cache coherency communication cost in a NoC-based MPSoC platformGustavo Girão, Bruno Cruz de Oliveira, Rodrigo Soares, Ivan Saraiva Silva. 288-293 [doi]
- The interval page table: virtual memory support in real-time and memory-constrained embedded systemsXiangrong Zhou, Peter Petrov. 294-299 [doi]
- A soft error robust and power aware memory designCostas Argyrides, Carlos Arthur Lang Lisbôa, Luigi Carro, Dhiraj K. Pradhan. 300-305 [doi]
- Parallelized radix-4 scalable montgomery multipliersNathaniel Ross Pinckney, David Money Harris. 306-311 [doi]
- A time petri net-based approach for hard real-time systems scheduling considering dynamic voltage scaling, overheads, precedence and exclusion relationsEduardo Tavares, Paulo Romero Martins Maciel, Bruno Silva, Meuse N. Oliveira Jr.. 312-317 [doi]
- Object and method exploration for embedded systems applicationsJúlio C. B. de Mattos, Luigi Carro. 318-323 [doi]
- Analysis of the use of declarative languages for enhanced embedded system software developmentEmilena Specht, Ricardo Miotto Redin, Luigi Carro, Luís da Cunha Lamb, Érika F. Cota, Flávio Rech Wagner. 324-329 [doi]
- Specification of alternative execution semantics of UML sequence diagrams within actor-oriented modelsLeandro Soares Indrusiak, Manfred Glesner. 330-335 [doi]
- FPGA infrastructure for the development of augmented reality applicationsGermano Guimarães, João Paulo S. M. Lima, João M. X. N. Teixeira, Guilherme D. Silva, Veronica Teichrieb, Judith Kelner. 336-341 [doi]
- An optimized hybrid approach to provide fault detection and correction in SoCsLeticia Maria Veiras Bolzani, Paolo Bernardi, Matteo Sonza Reorda. 342-347 [doi]
- A software-based methodology for the generation of peripheral test sets based on high-level descriptionsLeticia Maria Veiras Bolzani, Edgar E. Sánchez, Matteo Sonza Reorda. 348-353 [doi]
- Using majority logic to cope with long duration transient faultsLorenzo Petroli, Carlos Arthur Lang Lisbôa, Fernanda Lima Kastensmidt, Luigi Carro. 354-359 [doi]
- Functional verification of an MPEG-4 decoder design using a random constrained movie generatorGeorge Sobral Silveira, Karina R. G. da Silva, Elmar U. K. Melcher. 360-364 [doi]