A 65-nm pulsed latch with a single clocked transistor

Martin Saint-Laurent, Baker Mohammad, Paul Bassett. A 65-nm pulsed latch with a single clocked transistor. In Diana Marculescu, Anand Raghunathan, Ali Keshavarzi, Vijaykrishnan Narayanan, editors, Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007, Portland, OR, USA, August 27-29, 2007. pages 347-350, ACM, 2007. [doi]

Abstract

Abstract is missing.