Leakage power reduction for coarse grained dynamically reconfigurable processor arrays with fine grained Power Gating technique

Yoshiki Saito, Tomoaki Shirai, Takuro Nakamura, Takashi Nishimura, Yohei Hasegawa, Satoshi Tsutsumi, Toshihiro Kashima, Mitsutaka Nakata, Seidai Takeda, Kimiyoshi Usami, Hideharu Amano. Leakage power reduction for coarse grained dynamically reconfigurable processor arrays with fine grained Power Gating technique. In Tarek A. El-Ghazawi, Yao-Wen Chang, Juinn-Dar Huang, Proshanta Saha, editors, 2008 International Conference on Field-Programmable Technology, FPT 2008, Taipei, Taiwan, December 7-10, 2008. pages 329-332, IEEE, 2008. [doi]

@inproceedings{SaitoSNNHTKNTUA08,
  title = {Leakage power reduction for coarse grained dynamically reconfigurable processor arrays with fine grained Power Gating technique},
  author = {Yoshiki Saito and Tomoaki Shirai and Takuro Nakamura and Takashi Nishimura and Yohei Hasegawa and Satoshi Tsutsumi and Toshihiro Kashima and Mitsutaka Nakata and Seidai Takeda and Kimiyoshi Usami and Hideharu Amano},
  year = {2008},
  doi = {10.1109/FPT.2008.4762410},
  url = {http://dx.doi.org/10.1109/FPT.2008.4762410},
  researchr = {https://researchr.org/publication/SaitoSNNHTKNTUA08},
  cites = {0},
  citedby = {0},
  pages = {329-332},
  booktitle = {2008 International Conference on Field-Programmable Technology, FPT 2008, Taipei, Taiwan, December 7-10, 2008},
  editor = {Tarek A. El-Ghazawi and Yao-Wen Chang and Juinn-Dar Huang and Proshanta Saha},
  publisher = {IEEE},
  isbn = {978-1-4244-2796-3},
}