47% Power Reduction and 91% Area Reduction in Inductive-Coupling Programmable Bus for NAND Flash Memory Stacking

Mitsuko Saito, Yoichi Yoshida, Noriyuki Miura, Hiroki Ishikuro, Tadahiro Kuroda. 47% Power Reduction and 91% Area Reduction in Inductive-Coupling Programmable Bus for NAND Flash Memory Stacking. IEEE Trans. on Circuits and Systems, 57-I(9):2269-2278, 2010. [doi]

@article{SaitoYMIK10,
  title = {47% Power Reduction and 91% Area Reduction in Inductive-Coupling Programmable Bus for NAND Flash Memory Stacking},
  author = {Mitsuko Saito and Yoichi Yoshida and Noriyuki Miura and Hiroki Ishikuro and Tadahiro Kuroda},
  year = {2010},
  doi = {10.1109/TCSI.2010.2071670},
  url = {http://dx.doi.org/10.1109/TCSI.2010.2071670},
  researchr = {https://researchr.org/publication/SaitoYMIK10},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. on Circuits and Systems},
  volume = {57-I},
  number = {9},
  pages = {2269-2278},
}