Power analysis techniques for SoC with improved wiring models

Takeshi Sakamoto, Takashi Yamada, Mamoru Mukuno, Yoshifumi Matsushita, Yasoo Harada, Hiroto Yasuura. Power analysis techniques for SoC with improved wiring models. In Vivek De, Mary Jane Irwin, Ingrid Verbauwhede, Christian Piguet, editors, Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002, Monterey, California, USA, August 12-14, 2002. pages 259-262, ACM, 2002. [doi]

@inproceedings{SakamotoYMMHY02,
  title = {Power analysis techniques for SoC with improved wiring models},
  author = {Takeshi Sakamoto and Takashi Yamada and Mamoru Mukuno and Yoshifumi Matsushita and Yasoo Harada and Hiroto Yasuura},
  year = {2002},
  doi = {10.1145/566408.566476},
  url = {http://doi.acm.org/10.1145/566408.566476},
  tags = {analysis},
  researchr = {https://researchr.org/publication/SakamotoYMMHY02},
  cites = {0},
  citedby = {0},
  pages = {259-262},
  booktitle = {Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002, Monterey, California, USA, August 12-14, 2002},
  editor = {Vivek De and Mary Jane Irwin and Ingrid Verbauwhede and Christian Piguet},
  publisher = {ACM},
  isbn = {1-58113-475-4},
}