A Model Study of Multilevel Signaling for High-Speed Chiplet-to-Chiplet Communication in 2.5D Integration

Rakshith Saligram, Ankit Kaul, Muhannad S. Bakir, Arijit Raychowdhury. A Model Study of Multilevel Signaling for High-Speed Chiplet-to-Chiplet Communication in 2.5D Integration. In 28th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SOC 2020, Salt Lake City, UT, USA, October 5-7, 2020. pages 159-164, IEEE, 2020. [doi]

Authors

Rakshith Saligram

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Ankit Kaul

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Muhannad S. Bakir

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Arijit Raychowdhury

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