Synthesis of high performance low power PTL circuits

Debasis Samanta, M. C. Dharmadeep, Ajit Pal. Synthesis of high performance low power PTL circuits. In Hiroto Yasuura, editor, Proceedings of the 2003 Asia and South Pacific Design Automation Conference, ASP-DAC '03, Kitakyushu, Japan, January 21-24, 2003. pages 209-212, ACM, 2003. [doi]

Abstract

Abstract is missing.