Optimal Dual -VT Assignment for Low-Voltage Energy-Constrained CMOS Circuits

Debasis Samanta, Ajit Pal. Optimal Dual -VT Assignment for Low-Voltage Energy-Constrained CMOS Circuits. In Proceedings of the ASPDAC 2002 / VLSI Design 2002, CD-ROM, 7-11 January 2002, Bangalore, India. pages 193-198, IEEE Computer Society, 2002. [doi]

Authors

Debasis Samanta

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Ajit Pal

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