Optimal Dual -VT Assignment for Low-Voltage Energy-Constrained CMOS Circuits

Debasis Samanta, Ajit Pal. Optimal Dual -VT Assignment for Low-Voltage Energy-Constrained CMOS Circuits. In Proceedings of the ASPDAC 2002 / VLSI Design 2002, CD-ROM, 7-11 January 2002, Bangalore, India. pages 193-198, IEEE Computer Society, 2002. [doi]

@inproceedings{SamantaP02,
  title = {Optimal Dual -VT Assignment for Low-Voltage Energy-Constrained CMOS Circuits},
  author = {Debasis Samanta and Ajit Pal},
  year = {2002},
  url = {http://csdl.computer.org/comp/proceedings/vlsid/2002/1441/00/14410193abs.htm},
  researchr = {https://researchr.org/publication/SamantaP02},
  cites = {0},
  citedby = {0},
  pages = {193-198},
  booktitle = {Proceedings of the ASPDAC 2002 / VLSI Design 2002, CD-ROM, 7-11 January 2002, Bangalore, India},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-1299-2},
}