Synthesis of Low Power High Performance Dual-VT PTL Circuits

Debasis Samanta, Ajit Pal. Synthesis of Low Power High Performance Dual-VT PTL Circuits. In 17th International Conference on VLSI Design (VLSI Design 2004), with the 3rd International Conference on Embedded Systems Design, 5-9 January 2004, Mumbai, India. pages 85, IEEE Computer Society, 2004. [doi]

Abstract

Abstract is missing.