Multiway Partitioner for High Performance FPGA Based Board Architecture

Vijayanand Sankarasubramanian, Dinesh Bhatia. Multiway Partitioner for High Performance FPGA Based Board Architecture. In 1996 International Conference on Computer Design (ICCD 96), VLSI in Computers and Processors, October 7-9, 1996, Austin, TX, USA, Proceedings. pages 579, IEEE Computer Society, 1996. [doi]

Authors

Vijayanand Sankarasubramanian

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Dinesh Bhatia

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