Vijayanand Sankarasubramanian, Dinesh Bhatia. Multiway Partitioner for High Performance FPGA Based Board Architecture. In 1996 International Conference on Computer Design (ICCD 96), VLSI in Computers and Processors, October 7-9, 1996, Austin, TX, USA, Proceedings. pages 579, IEEE Computer Society, 1996. [doi]
@inproceedings{SankarasubramanianB96, title = {Multiway Partitioner for High Performance FPGA Based Board Architecture}, author = {Vijayanand Sankarasubramanian and Dinesh Bhatia}, year = {1996}, url = {http://dlib2.computer.org/conferen/iccd/7554/pdf/75540579.pdf}, tags = {rule-based, architecture, partitioning}, researchr = {https://researchr.org/publication/SankarasubramanianB96}, cites = {0}, citedby = {0}, pages = {579}, booktitle = {1996 International Conference on Computer Design (ICCD 96), VLSI in Computers and Processors, October 7-9, 1996, Austin, TX, USA, Proceedings}, publisher = {IEEE Computer Society}, isbn = {0-8186-7554-3}, }