André Flores dos Santos, Lucas Antunes Tambara, Fabio Benevenuti, Jorge Tonfat, Fernanda Lima Kastensmidt. Applying TMR in Hardware Accelerators Generated by High-Level Synthesis Design Flow for Mitigating Multiple Bit Upsets in SRAM-Based FPGAs. In Stephan Wong, Antonio Carlos Schneider Beck, Koen Bertels, Luigi Carro, editors, Applied Reconfigurable Computing - 13th International Symposium, ARC 2017, Delft, The Netherlands, April 3-7, 2017, Proceedings. Volume 10216 of Lecture Notes in Computer Science, pages 202-213, 2017. [doi]
Abstract is missing.