A Structured Approach for Rapid Identification of Fault-Sensitive Nets in Analog Circuits

Sayandeep Sanyal, Amit Patra, Pallab Dasgupta, Mayukh Bhattacharya. A Structured Approach for Rapid Identification of Fault-Sensitive Nets in Analog Circuits. In 28th IEEE Asian Test Symposium, ATS 2019, Kolkata, India, December 10-13, 2019. pages 135-140, IEEE, 2019. [doi]

Abstract

Abstract is missing.