Multi-bit fault tolerant design for resistive memories through dynamic partitioning

Sutapa Sarkar, Mousumi Saha, Biplab K. Sikdar. Multi-bit fault tolerant design for resistive memories through dynamic partitioning. In 2017 IEEE East-West Design & Test Symposium, EWDTS 2017, Novi Sad, Serbia, September 29 - October 2, 2017. pages 1-6, IEEE Computer Society, 2017. [doi]

References

No references recorded for this publication.

Cited by

No citations of this publication recorded.