CASH: compiler assisted hardware design for improving DRAM energy efficiency in CNN inference

Anup Sarma, Huaipan Jiang, Ashutosh Pattnaik, Jagadish Kotra, Mahmut Taylan Kandemir, Chita R. Das. CASH: compiler assisted hardware design for improving DRAM energy efficiency in CNN inference. In Proceedings of the International Symposium on Memory Systems, MEMSYS 2019, Washington, DC, USA, September 30 - October 03, 2019. pages 396-407, ACM, 2019. [doi]

@inproceedings{SarmaJPKKD19,
  title = {CASH: compiler assisted hardware design for improving DRAM energy efficiency in CNN inference},
  author = {Anup Sarma and Huaipan Jiang and Ashutosh Pattnaik and Jagadish Kotra and Mahmut Taylan Kandemir and Chita R. Das},
  year = {2019},
  doi = {10.1145/3357526.3357536},
  url = {https://doi.org/10.1145/3357526.3357536},
  researchr = {https://researchr.org/publication/SarmaJPKKD19},
  cites = {0},
  citedby = {0},
  pages = {396-407},
  booktitle = {Proceedings of the International Symposium on Memory Systems, MEMSYS 2019, Washington, DC, USA, September 30 - October 03, 2019},
  publisher = {ACM},
  isbn = {978-1-4503-7206-0},
}