Paul T. Sasaki, Yogendra Bobra, Warren E. Cory, Atul V. Cihia, Suresh M, Menon, Madhavi Kola, Mammen Thomas, Prasad Rau, Arch Zaliznyak. A fast, predictable FPGA with PLLs, dual port SRAMs and active repeaters. In Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, CICC 1999, San Diego, CA, USA, May 1649,1999. pages 179-182, IEEE, 1999. [doi]
@inproceedings{SasakiBCCMMKTRZ99,
title = {A fast, predictable FPGA with PLLs, dual port SRAMs and active repeaters},
author = {Paul T. Sasaki and Yogendra Bobra and Warren E. Cory and Atul V. Cihia and Suresh M and Menon and Madhavi Kola and Mammen Thomas and Prasad Rau and Arch Zaliznyak},
year = {1999},
doi = {10.1109/CICC.1999.777269},
url = {https://doi.org/10.1109/CICC.1999.777269},
researchr = {https://researchr.org/publication/SasakiBCCMMKTRZ99},
cites = {0},
citedby = {0},
pages = {179-182},
booktitle = {Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, CICC 1999, San Diego, CA, USA, May 1649,1999},
publisher = {IEEE},
isbn = {0-7803-5443-5},
}