A fast, predictable FPGA with PLLs, dual port SRAMs and active repeaters

Paul T. Sasaki, Yogendra Bobra, Warren E. Cory, Atul V. Cihia, Suresh M, Menon, Madhavi Kola, Mammen Thomas, Prasad Rau, Arch Zaliznyak. A fast, predictable FPGA with PLLs, dual port SRAMs and active repeaters. In Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, CICC 1999, San Diego, CA, USA, May 1649,1999. pages 179-182, IEEE, 1999. [doi]

Abstract

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