Visvesh S. Sathe, Srikanth Arekapudi, Alexander T. Ishii, Charles Ouyang, Marios C. Papaefthymiou, Samuel Naffziger. Resonant-Clock Design for a Power-Efficient, High-Volume x86-64 Microprocessor. J. Solid-State Circuits, 48(1):140-149, 2013. [doi]
@article{SatheAIOPN13,
title = {Resonant-Clock Design for a Power-Efficient, High-Volume x86-64 Microprocessor},
author = {Visvesh S. Sathe and Srikanth Arekapudi and Alexander T. Ishii and Charles Ouyang and Marios C. Papaefthymiou and Samuel Naffziger},
year = {2013},
doi = {10.1109/JSSC.2012.2218068},
url = {http://dx.doi.org/10.1109/JSSC.2012.2218068},
researchr = {https://researchr.org/publication/SatheAIOPN13},
cites = {0},
citedby = {0},
journal = {J. Solid-State Circuits},
volume = {48},
number = {1},
pages = {140-149},
}