Resonant clock design for a power-efficient high-volume x86-64 microprocessor

Visvesh S. Sathe, Srikanth Arekapudi, Charles Ouyang, Marios C. Papaefthymiou, Alexander T. Ishii, Samuel Naffziger. Resonant clock design for a power-efficient high-volume x86-64 microprocessor. In 2012 IEEE International Solid-State Circuits Conference, ISSCC 2012, San Francisco, CA, USA, February 19-23, 2012. pages 68-70, IEEE, 2012. [doi]

Authors

Visvesh S. Sathe

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Srikanth Arekapudi

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Charles Ouyang

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Marios C. Papaefthymiou

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Alexander T. Ishii

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Samuel Naffziger

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