Generating hardware and software for RISC-V cores generated with Rocket Chip generator - researchr publication authors

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Süleyman Savas, Endri Bezati, Jörn W. Janneck. Generating hardware and software for RISC-V cores generated with Rocket Chip generator. In Gang Qu 0001, Jinjun Xiong, Danella Zhao, Venki Muthukumar, Md Farhadur Reza, Ramalingam Sridhar, editors, 34th IEEE International System-on-Chip Conference, SOCC 2021, Las Vegas, NV, USA, September 14-17, 2021. pages 89-94, IEEE, 2021. [doi]

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