Yogesh Dilip Save, H. Narayanan, Sachin B. Patkar. Two Graph Based Circuit Simulator for PDE-Electrical Analogy. In Vishwani D. Agrawal, Srimat T. Chakradhar, editors, 25th International Conference on VLSI Design, VLSID 2012, Hyderabad, India, January 7-11, 2012. pages 400-405, IEEE, 2012. [doi]
@inproceedings{SaveNP12,
title = {Two Graph Based Circuit Simulator for PDE-Electrical Analogy},
author = {Yogesh Dilip Save and H. Narayanan and Sachin B. Patkar},
year = {2012},
doi = {10.1109/VLSID.2012.104},
url = {http://doi.ieeecomputersociety.org/10.1109/VLSID.2012.104},
researchr = {https://researchr.org/publication/SaveNP12},
cites = {0},
citedby = {0},
pages = {400-405},
booktitle = {25th International Conference on VLSI Design, VLSID 2012, Hyderabad, India, January 7-11, 2012},
editor = {Vishwani D. Agrawal and Srimat T. Chakradhar},
publisher = {IEEE},
isbn = {978-1-4673-0438-2},
}