A Method to Derive Compact Test Sets for Path Delay Faults in Combinational Circuits

Jayashree Saxena, Dhiraj K. Pradhan. A Method to Derive Compact Test Sets for Path Delay Faults in Combinational Circuits. In Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics - Join Them, Baltimore, Maryland, USA, October 17-21, 1993. pages 724-733, IEEE Computer Society, 1993.

@inproceedings{SaxenaP93:0,
  title = {A Method to Derive Compact Test Sets for Path Delay Faults in Combinational Circuits},
  author = {Jayashree Saxena and Dhiraj K. Pradhan},
  year = {1993},
  tags = {testing},
  researchr = {https://researchr.org/publication/SaxenaP93%3A0},
  cites = {0},
  citedby = {0},
  pages = {724-733},
  booktitle = {Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics - Join Them, Baltimore, Maryland, USA, October 17-21, 1993},
  publisher = {IEEE Computer Society},
  isbn = {0-7803-1430-1},
}