System-Aware Performance Monitoring Unit for RISC-V Architectures - researchr publication authors

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Tobias Scheipel, Fabian Mauroner, Marcel Baunach. System-Aware Performance Monitoring Unit for RISC-V Architectures. In Hana Kubátová, Martin Novotný, Amund Skavhaug, editors, Euromicro Conference on Digital System Design, DSD 2017, Vienna, Austria, August 30 - Sept. 1, 2017. pages 86-93, IEEE, 2017. [doi]

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