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Modelling and compensating for clock skew variability in FPGAs

N. Pete Sedcole, Justin S. Wong, Peter Y. K. Cheung. Modelling and compensating for clock skew variability in FPGAs. In Tarek A. El-Ghazawi, Yao-Wen Chang, Juinn-Dar Huang, Proshanta Saha, editors, 2008 International Conference on Field-Programmable Technology, FPT 2008, Taipei, Taiwan, December 7-10, 2008. pages 217-224, IEEE, 2008. [doi]

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N. Pete Sedcole

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Justin S. Wong

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Peter Y. K. Cheung

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